The present invention relates to a method of manufacturing semiconductor devices and a semiconductor device manufactured by the method.
With the recent spread of portable electronic devices, the demand has increased for scaling down the dimensions of, reducing the weight of, and enhancing the performance of semiconductor packages. Heretofore, electrodes on top of semiconductor chips are connected to external leads by means of wire bonding. Two-terminal devices, such as diodes, are connected through internal leads to external leads by means of soldering.
With three-terminal devices, such as power MOS FETs, which handle relatively high current, soldering connection is desirable; however, since a gate electrode formed on a chip are very small in comparison with a source electrode, soldering of internal leads can not be applied because of poor position precision. For this reason, a gate electrode is connected by means of a single bonding wire, while a source electrode is connected by means of multiple bonding wires for ensuring current capacity.
There is a method in which a gate electrode is connected by means of wire bonding which allows the use of a fine wire and a source electrode is connected by means of soldering favorable for heat radiation and on resistance. However, this method results in the increased cost of manufacture and manufacturing facility because different materials which involve different surface finishes for electrodes are used for the gate electrode and the source electrode. To be specific, a material suitable for wire bonding, say, Al, is used for the gate electrode and a material suitable for soldering, say, VNiAu, is used for the source electrode.
In many cases, two power MOSFETs are connected in series. Conventionally, this series combination is made by wiring on a printed circuit board. With this approach, parasitic capacitance and resistance are associated with wiring, which may result in loss in performance.